Japan’s hardware manufacturing giant Fujitsu announced that they were field-testing a prototype ARM microchip that could power a next-generation supercomputer. Fujitsu’s engineers have said that if this microchip works, then it would take Japan back to the lead when it comes to raw processing ability. The research is being conducted in association with RIKEN, which is the largest research R&D institute in Japan.
Media outlets are currently referring to the hypothetical computer as the Post-K machine. The announcement comes on the heels of engineers from both organizations testing an 8 petaflop K design, which is where the slightly unusual name for the hardware comes from.
Tests have technically been ongoing since 2012, and the machine has now proven it can perform calculations at up to 11 petaflops. A true Post-K machine is supposed to have over one hundred times this CPU power. Engineers have apparently decided to measure that in terms of application execution performance as opposed to using another more popular hardware metric. This might make some of their measurements more accurate, though some commentators feel that it seems rather ambitious to require that kind of performance out of a new supercomputer.
If technicians were able to achieve those speeds, then this would place this new machine in entirely new territory. One of the most important upgrades came in the form of deprecating SPARC hardware.
Existing K computer hardware uses SPARC64 VIIIfx microchips, which date back even further in terms of design lineage to the days of older Sun chips. Though they’re somewhat dissimilar to international Sun chips, they’re close enough to make use of the same architecture in terms of machine code. As a result, some developers have ceased support for them in spite of the fact that Fujitsu’s own processor development continues unabated by trends in the hardware industry.
New chips are going to be based around the Arm8A-SVE 512-bit architecture. These chips are still technically related to the ARM CPUs that are deployed in many types of mobile devices, but they’re enhanced for use in supercomputers. Each of these CPUs features 48 regular cores with additional assistant cores. Each node features a single CPU.
Perhaps most impressively, the design calls for 384 computer chips on a single rack.